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Except that using void Xil_DCache Invalidate Range(unsigned int adr, unsigned len) invalidates a cache line but not necessarily where the packet information starts.It looks at the address I pass to it, then it moves from there to the start of the first cache line and only then begins invalidating the cache. I have tried simply disabling the entire cache at the start of the program, however this doesn't seem to work.A method and apparatus for invalidating cache lines during direct memory access (DMA) write operations are disclosed.Initially, a multi-cache line DMA request is issued by a peripheral device.We'll give you an RMA (return material authorization) number that will help us track your return and make sure you receive your refund or exchange as soon as possible.We'll even pay for return shipping if the problem is on us.

My problem is that when I go to read the data that the BD points to, the cached data is wrong, so I invalidate it.I have a problem that I am trying to fix in a program I have written.I receive internet packets, the Rx interrupt affects a bool so that in a loop I can to to then request the Rx BD from the hardware.In the unlikely event that your memory fails after the 45-day money-back period, please call us!At Crucial, our limited warranty guarantees that your memory will work properly.

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